Fred Sendig has been in EDA for over 25 years. For the past 10 years, he has been responsible for the technical direction of custom design platforms. He is currently the VP of R&D and a Synopsys Fellow responsible for Galaxy Custom Designer.
Kishore Singhal is a Synopsys Scientist with responsibility for developing advanced circuit simulation and statistical analysis techniques. He is the co-author of Computer Methods for Circuit Analysis and Design.
Bob Lefferts is the director of Synopsys’ Hillsboro PHY IP Development group. His interests include high-speed SERDES and analog design, technology development, and device modeling & characterization.Kicking off Analog Insights
Posted by Mike Demler on September 27th, 2007
Welcome to “Analog Insights”
Let’s start by asking the question, what exactly is an analog insight? Something that I heard just last week in a keynote address at BMAS-2007 (IEEE Behavioral Modeling and Simulation Workshop) sums it up for me. This came from San Nassif of IBM, who spoke on the evolution of “Model to Hardware Correlation for Nanometer Technologies”. In his presentation he made the point that the semiconductor industry changed from chip engineering to chip computer science after Mead & Conway.
For those of you who weren’t around back then, Mead & Conway published the seminal text “Introduction to VLSI Systems” back in 1980. This was a few years before Design Compiler was invented. “VLSI Systems” proposed the revolutionary (at the time) idea that the process of IC design could be automated to the point that engineers would not need to know anything about transistors. Well, this was just blasphemy to analog engineers like myself back then!
Now, in 2007, chip computer science such as RTL to gate-level synthesis is taken for granted in digital design methodologies. But chip engineering and analog design never went away, and nanometer effects now dictate that that all IC design requires careful chip engineering once again. Nanometer design requires an analog insight into transistor-level behavior such as device variability, leakage, dynamic IR drop, electromigration, crosstalk… all analog effects that render what was formerly a simple binary view of the world with a great deal of uncertainty. At the same time, analog designers have continued to do amazing things in advancing the state of their art while transistors and operating voltages continue to shrink and make their lives more difficult. A lot of analog insight is required to be able to design analog, mixed-signal, and RF functions on an SoC with millions of digital transistors. But without that insight, the consumer electronics that we are all so accustomed to would not exist.
My hope is that this blog will become a lively place to discuss a wide range of analog insights. Hopefully, the insights will come not just from me, but from the readers of this blog who live with these issues on a daily basis.
To kick things off, here is a list of topics that come to mind. What are your insights?
- What is the most difficult aspect of the analog design process? What is the most enjoyable?
- If you could have any one tool to make your job easier, what would it be?
- Are analog engineers truly different from digital engineers?
- What made you choose analog design over a different career?
- What applications are you working on; consumer electronics, wireless communication, networking, power management, etc., etc.?
- What process technology are you working in?
- If you have been doing analog for a while, do you think the tools have gotten better or stayed the same?
- Do shrinking processes make analog design more difficult?
- What part of your job do you wish you could hand off to someone else to do?
- How does it feel to get working silicon back for a new design? Is that the buzz that keeps you doing this, or if not, what is?
- Do you worry about digital technology eliminating the need for analog?
- How do you interface to the digital engineers? Do you work in digital as well?
- Do you use programming or modeling languages: Verilog, Verilog-AMS, etc.?
-Mike
Analog Insights
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Mike:
Enjoy your article. Your extensive analog IC design background combined with the right EDA tool mindset would give you a tremendous edge asking all right questions. I am as curious as you and everyone else to know the response to the questions you posted here. However, I would like to have your opinion first on the product that Synopsys acquired from ADA (Analog Design Automation) a few years back. How much do you think that kind of tool can help analog designers from scale 1 to 10, with 10 being the highest score.
Thanks,
Hello Hau-Yung,
Thank you for your comments. I am glad that you enjoyed my blog article, and I hope that you subscribe to the RSS feed to keep up to date on the discussions here.
I think that the ADA tool you are referring to is Circuit Explorer, which is used for circuit optimization (http://synopsys.com/products/mixedsignal/hspice/circuit_explorer.html). Once upon a time ADA was my competitor, when I was working on analog synthesis at Antrim Design Systems. So, I have to admit to a bias in that I was personally involved in developing optimization tools myself. I think that they are extremely valuable, but like all tools they need to be understood by the users and not used as a “crutch”.
Back in my Antrim days when I was out talking to analog designers about this subject, I would often get comments that optimizers don’t work, or that designers didn’t trust them. Optimizers have improved tremendously since the first primitive versions that I used in HSPICE many years ago. My response to the skeptics was to ask how they did their designs now, how they used simulation to perform analysis and adjust design parameters. How much time do designers spend staring at waveforms to choose “optimal” device dimensions? I would tell designers that this is just manual optimization, and that they would be much more productive if they had a tool to do that for them. Managers often understood that argument better than the designers
I was challenged once to show that my optimization tool could produce a result as good as what the designers had come up with at one of my customers. Every time I ran the optimizer to show how quickly I could size the circuit to achieve multiple objectives, the designers would add a new constraint. This type of problem is very difficult to resolve manually. But my optimizer could handle it very easily, and automatically. At the end of my week-long visit, I came away with a big purchase order. I wonder how long it took the designers to develop the circuit originally. They never told me
-Mike