Analog Insights is based on my personal experience that analog design is by no means “black magic”, but it is very hard. As IC design has evolved into distinct analog and digital communities, issues arise when “analog meets digital” in the design and verification of complex mixed-signal SoCs. These issues, and more, are the subjects that I cover here.Latest posts from “The World is Analog”
Posted by Mike Demler on May 29th, 2009
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Tweet.. tweet…
Posted by Mike Demler on May 8th, 2009
Unless you’ve been living in a cave for the past year, you’ve probably heard about Twitter. It’s all the rage in the social media world, more than doubling the number of users month-to-month lately. Traffic is what it’s all about in the internet business, so there have been plenty of rumors that Apple will buy Twitter, or Google will buy Twitter… even though they haven’t figured out how to make money yet.
You may be thinking, “what do I need Twitter for”? Yes, there is a lot of useless drivel like what I’m having for lunch, but if you look at is as a good way to stay informed in real time – it can actually be very useful. The nice thing is that you get to choose who you want to follow.
I have found myself micro-blogging on Twitter much more, because I just don’t have the time to write full blogs as frequently. There is a growing group of EDA folks on Twitter that I follow, and I recommend you look into following them as well. Information on my Twitter feed is now in the left sidebar here at Analog Insights. You can follow me on Twitter through an RSS feed, or by creating your own Twitter account:
My Twitter RSS feed: http://twitter.com/statuses/user_timeline/20415938.rss
My Twitter ID: http://twitter.com/MikeDemler
FYI, now that I am not employed in EDA, my primary blogging home is The World is Analog. If you want to keep abreast of my latest posts, wherever they are, I always put a “tweet” out so you can be immediately notified.
-Mike
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Posts from DVCon – 2009
Posted by Mike Demler on March 2nd, 2009
Hi All,
You can check out my DVCon posts at The World is Analog:
-Mike.
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DVCon
Posted by Mike Demler on February 24th, 2009
The annual Design and Verification Conference – DVCon is being held this week, at the Doubletree Hotel in San Jose, CA. In case you had any trouble finding the agenda of the technical programs on the DVCon website, I have copied the links and schedule here:
Wednesday at DVCon:
February 25, 2009
7:00 AM
Breakfast: Prototyping: Where Hardware & Software First Meet(Pine/Cedar Ballroom)8:15- 8:45
Opening Session (Oak Ballroom)
9:00-10:30
Session 1 (Fir Ballroom): Verification Methodology and Testbenches – I
Session 2 (Oak Ballroom) :Formal Verification Applications11:00-12:30
Session 3 (Fir Ballroom) :Increasing Functional Coverage
Session 4(Oak Ballroom):Emulation/AccelerationLunch Presentation: Case Studies of OVM in Multi-language Verification Environment (Pine/Cedar Ballroom)
2:00-2:45
Keynote (Oak/Fir Ballroom):”The Techonomics of Verification”
Aart de Geus – CEO and Chairman of the Board – Synopsys, Inc.3:15-5:00
Panel: EDA: Dead or Alive? (Oak/Fir Ballroom)5:00-6:30pm
Cocktail Reception
8:30-10:00
Session 5 (Donner Ballroom): Verification Methodology and Testbenches – II
Session 6 (Cascade Ballroom): Low Power Verification
Session 7 (Siskiyou Ballroom): Verification Data Management10:30-12:00
Session 8 (Donner Ballroom): Verification Methodology and Testbenches -III
Session 9 (Cascade Ballroom): Mixed-signal Design and Verification
Session 10 (Siskiyou Ballroom): Case Studies – ILunch Presentation (Pine/Cedar Ballroom): Risky Business: How Do I Manage Risk in My Next Design Project?
1:30-3:00
Session 11 (Donner Ballroom): Low Power Management
Session 12 (Cascade Ballroom): Programming with SystemVerilog
Session 13 (Siskiyou Ballroom): Case Studies – II3:30-5:00 (Donner/Siskiyou Ballroom)
Panel: Mixing Formal Analysis with Simulation: Why, When, Where, and How?5:30-6:00 (Donner/Siskiyou Ballroom): Closing Session 2009 Best Paper Award Presentation
I will be attending Wednesday afternoon, and am particularly looking forward to the panel discussion: “EDA: Dead or Alive?” to be moderated by Peggy Aycinena.
Personally, I’d say EDA is not dead, but if you look at the industry overall it is pretty comatose. That could probably be said of the economy in general right now, but much of the problem in EDA is self-inflicted. As a student of economics and business management, I am actually looking forward to seeing the inefficiencies shaken out. A major re-structuring of the EDA industry is called for, so that it can better serve the needs of its customers. There is no room any more for all the redundancy, waste and sloppy management that has gone on for too many years. It should be interesting!
On Thursday, I will be attending the session on Mixed-signal Design and Verification:
Session Chair: Thomas J. Sheffler – Consultant
9.1 Validating WiMAX OFDMA using SystemVerilog and VMM
Albert Chiang, Wei-Hua Han – Synopsys, Inc.
Bhanu Kapoor – Mimasic
9.2 A SystemVerilog Approach for Analog/Mixed-signal Verification
Shyam Rapaka, Tapan Halder – Synopsys, Inc.
Vikas Chandra – ARM
9.3 Get to ASICs Faster – a Novel Mixed-signal Design Methodology
Greg Tumbush – Tumbush Enterprises, LLC
Gareth Weale, Dustin Griesdorf, William Gonnason, Marc Matthey, Andreas Drollinger, Alaa El-Agha – ON Semiconductor
Holger Meiners – Consultant
I hope to see many of you there.
-Mike 
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Highlights of ISSCC 2009
Posted by Mike Demler on February 22nd, 2009
Hi All,
I recently attended the International Solid States Circuits Conference, which was held in San Francisco on February 9-11. (The main conference, there are other events before and after).
My report “Highlights of the 2009 International Solid State Circuits Conference (ISSCC)” is now available for (free) download from the website of digdia, where I am doing some work as a Strategic Analyst. Here is the abstract from the report:
The theme of this year’s ISSCC was “Adaptive Circuits and Systems”. Though semiconductor manufacturing technology may be close to reaching the physical limits of Moore’s Law, ISSCC-2009 showed that we are clearly not there yet. Progress continues to be made in shrinking transistors, with Intel disclosing the first use of 32nm technology, while also providing a vision for achieving the next step down to 22nm.
Presenters at ISSCC-2009 demonstrated how advances in technology and circuit innovation can be combined to make more adaptable devices, using digital control and programmability to provide benefits for many applications. This report highlights the most significant innovations from ISSCC in the areas of consumer electronics and digital media.
I invite all of you to go to digdia.com to get the free download. A more comprehensive report, with detailed analysis of the trends and implications for the semiconductor and EDA industries, will be available for purchase at a later date. Please contact me if you are interested, or if you have a particular topic that you would like to see me cover.
-Mike
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